1. Field
The present disclosure relates to a mixer, and more particularly to a field effect transistor (FET) mixer having reduced levels of intermodulation distortion.
2. Related Art
A mixer circuit converts radio frequency (RF) power into power at another frequency to make signal processing easier and more efficient. More particularly, a RF input signal is converted, i.e., shifted, by the mixer circuit into an intermediate frequency (IF) output signal. A mixer circuit will also be referred to as a mixer herein. Mixers are a fundamental component of communication systems, providing improved filtering and easier implementation of low noise/high gain amplification at the intermediate frequency than possible when processing signals at the radio frequency.
A mixer converts the RF input signal into the IF output signal by multiplying the RF input signal with a local oscillator (LO) input signal which provides the power, i.e., voltage, for the conversion. A LO input signal is often referred to as LO drive. In an ideal mixer, multiplication of the RF input signal with the LO input signal would result in two only outputs: a first one at the frequency sum of the RF input signal and LO input signal, and a second one another at the frequency difference between the RF input signal and LO input signal. These can be easily filtered to obtain the desired IF output signal and to reject the other. In practice, however, a mixer generates undesirable intermodulation products, i.e., intermodulation distortion, which obscure the desired IF output signal. Intermodulation distortion results from non-linear mixer response to RF input signals. Intermodulation distortion typically begins to appear in a mixer's output when the power level of the RF input signal increases beyond the +1 dB compression point, to be discussed further below.
A third-order intermodulation product occurs, most typically, when a second input signal arrives at the mixer input along with the desired RF input signal. Of the different intermodulation products which may be produced by a mixer, the third-order intermodulation product is closest in frequency to the desired IF output signal. Because of the closeness of the frequency of the third-order intermodulation product to the desired frequency of the IF output signal, it is oftentimes difficult to filter out the third-order intermodulation product, e.g., remove or suppress from the IF output signal. Third-order intermodulation distortion generated by a mixer will be discussed further below.
Mixer performance can be measured in various ways. One measure is known as dynamic range. A mixer's dynamic range defines the range of RF input signal power over which a mixer provides useful operation, i.e., the range of RF input signal power in which a non-degraded IF output signal is generated by the mixer. The upper limit of the dynamic range is typically defined as the +1 dB compression point of the mixer. The lower limit of the dynamic range is generally defined as the noise figure of the mixer.
As the power level of the RF input signal increases from zero, the power level of the IF output signal linearly follows. However, at a certain RF input signal power level the IF output signal power level no longer follows the RF input signal in linear progression. At this point the power level of the IF output signal increases at a slower rate until the power level of the IF output signal becomes almost level. The RF input signal power level above which the IF output signal deviates from linearity is known as conversion compression and is another mixer performance measure.
Conversion loss, expressed in dB, is another measure of mixer performance. Conversion loss describes the efficiency of a mixer in providing frequency translation between the RF input signal and the IF output signal and relates to loss of power between the RF input signal and the IF output signal during frequency translation. Thus, conversion loss is equal to the ratio of the power level of the IF output signal to the power level of the RF input signal at a specified power level of the LO drive. A specified power level for the LO drive is necessary because conversion loss varies as the power level of the LO drive varies.
The RF input signal power level at which the conversion loss increases by 1 dB is known as the +1 dB compression point and is still another mixer performance measure. The +1 dB compression point is utilized as the top of the dynamic range because RF input signal power beyond the +1 dB compression point generally is not converted into the desired IF output signal, but instead converted into heat and intermodulation products, i.e., distortion. Thus, the +1 dB compression point is the maximum RF signal input power level at which the mixer is designed to be used. In general, the +1 dB compression point is 5 to 10 dB lower than the LO drive power.
Introduced above, the lower limit of the dynamic range of a mixer is, by usual convention, defined to be the noise figure of the mixer. Noise figure, yet another mixer performance measure, is a measure, expressed in dB, of the degradation of the signal to noise ratio caused by the mixer. Noise figure is calculated by dividing the signal-to-noise ratio at the RF signal input by the signal-to-noise ratio at the IF signal output. Noise figure is typically +1 dB above a mixer's conversion loss.
Another measure of mixer performance reflects a mixer's ability to suppress IF output signal distortion caused by third-order intermodulation products and is known as a third-order intercept point, commonly abbreviated IP3. IP3 is expressed in dBm and is determined using the “third-order intercept” technique for modelling nonlinear systems and devices. This mathematical construct is based upon low order polynomials derived by Taylor series expansion.
Output IP3 and input IP3 are both commonly specified for mixers. Output IP3 is the difference between a mixer's input IP3 and the mixer's conversion loss. Thus, higher conversion losses result in lower output IP3.
A mixer's input IP3 is a theoretical point on a RF input signal power versus IF output signal power curve where the power level of the desired IF output signal and power level of the third-order intermodulation products become equal in amplitude as the power level of the RF input signal is raised. In other words, input IP3 is the point of intersection of an extrapolation of the linear primary response of the mixer and the third-order intermodulation response of the mixer past the +1 dB compression point until they equal each other. A higher input IP3 indicates better mixer performance, reflecting a mixer's ability to handle higher RF input signal power levels before third-order intermodulation products cause distortion in the desired IF output signal.
Three typical types of mixer circuits are single ended mixer circuits, balanced mixer circuits, and double balanced mixer circuits. Several prior art double balanced mixers are known. One such known double balanced mixer design uses a schottky diode quad, or ring, circuit that uses four diodes with all of the diodes pointed in the same direction. Another known double balanced mixer design is known as a called a star circuit and uses two diodes pointing toward a central node and two diodes pointing away from the central node. Double balanced mixers with schottky diodes typically have an input IP3 of 25 to 30 dBm, with 30 dBm being the practical upper limit of the design type. As the input IP3 of a schottky diode double balanced mixers approaches 30 dBm, the mixer becomes both difficult to tune and expensive, which increases both the manufacturing complexity and cost. Another draw back to the diode-based double balanced mixer design is that they require large LO drive levels to obtain a high input IP3, which for many applications and systems is not practical.
Another type of double balanced mixer circuit uses field effect transistors (FET) as the mixing element instead of diodes. Double balanced FET-based mixers, often referred to as FET mixers, or resistive mixers, can achieve a higher value of input IP3 than diode-based mixers. It is common for double balanced FET mixers to have an input IP3 greater than 30 dBm. However, in these FET-based mixers the increased IP3 comes at the cost of higher conversion losses and higher noise figures.
FIG. 1 shows a schematic diagram of a known double balanced resistive FET mixer 10 which attempts to address these shortcomings. The circuit design of mixer 10 attempts to achieve high input IP3 performance of other FET-based mixers, while also having a low noise figure and without having substantial conversion loss. Commercially available FET mixers having design similar to that shown in FIG. 1 are the HJK series of FET mixers available from the manufacturer Mini-Circuits® of Brooklyn, N.Y., 11235. The HJK series manufacturer reports performance characteristics of its double balanced resistive FET mixers of up to 38 dBm output IP3 with a LO drive level of 19 dBm.
The double balanced resistive FET mixer 10 of FIG. 1 has a design similar to the well known diode-based quad mixer, introduced above. Mixer 10, a passive device, includes four identical field effect transistors Q1, Q2, Q3, Q4 arranged in a quad configuration and which function as mixing elements. When a field effect transistor is conducting it is said to be in an ‘on’ state. Likewise, when a field effect transistor is not conducting it is said to be in an ‘off’ state.
The double balanced resistive FET mixer 10 also includes a local oscillator input terminal LO connected to balanced-unbalanced (balun) LO transformer T1. The LO input terminal receives a local oscillator input signal (i.e., LO drive), and LO balun T1 couples the received LO input signal to the gate terminal G of each respective FET Q1, Q2, Q3, Q4.
Mixer 10 also includes a radio frequency input terminal RF connected to balanced-unbalanced (balun) RF transformer T2. The RF input terminal receives a radio frequency input signal, and RF balun T2 couples the received RF input signal to the FETs Q1, Q2, Q3, and Q4. Also included in mixer 10 is an intermediate frequency output terminal IF connected to balanced-unbalanced (balun) IF transformer T3. IF balun T3 couples output from each FET Q1, Q2, Q3, Q4 to the IF output terminal.
Each respective FET Q1, Q2, Q3, Q4 has a gate terminal G for controlling whether that FET is conducting or not conducting, as is well known in the art. Thus, when one of FETs Q1, Q2, Q3, Q4 is conducting it can be described as being ‘gated on’. With reference to FIG. 1, the gate terminal G of FET Q1 is connected to the gate terminal G of FET Q3, and the gate terminal G of FET Q2 is connected to the gate terminal G of FET Q4. FET Q1 and FET Q3 can be referred to as gate-connected FET pair Q1,Q3. Likewise, FET Q2 and FET Q4 can be referred to as gate-connected FET pair Q2,Q4.
It will also be recognized by those having familiarity with field effect transistors that in addition to gate terminal G, each of the four FETs Q1, Q2, Q3, Q4 also has two terminals between which current can flow. By convention, one is known as the source terminal and the other is known as the drain terminal, dependent upon the direction of current flow between the two terminals. Source terminals and drain terminals of the same FET are structurally identical. As also will be recognized, current flow direction in a FET can be controlled such as by biasing one and/or the other of these two terminals. Because each of the FETs Q1, Q2, Q3, Q4 is built symmetrically from a source-to-terminal perspective, and because during operation of the mixer 10 each of the FETs Q1, Q2, Q3, Q4 is operated without biasing either of these two terminals, each of the FETs Q1, Q2, Q3, Q4 may be thought of as a symmetrical device having equivalent source and drain terminals. Accordingly, source terminals and drain terminals are not differentiated in FIG. 1.
During operation of mixer 10, when the LO input signal is in its positive half-cycle, two gate-connected FETs conduct, while the other two gate-connected FETs do not conduct. The converse is true when the LO input signal is in its negative half-cycle. The LO input signal switches Q1 and Q3 on and off in anti-phase with Q3 and Q4. The frequency at which the gate-connected FET pairs switch state, i.e. switch from conducting to not conducting, is dependent upon the frequency of the LO input signal at LO.
In general, current flow between source and drain terminals is controlled by gate voltage (the voltage between the gate and source terminals). A threshold voltage of a typical FET, such as FETs Q1, Q2, Q3, Q4, is defined as the gate voltage at which a conductive channel is formed between source terminal and drain terminal. Thus, if the gate voltage is below the threshold voltage, an FET is in the ‘off’ state, and if the gate voltage is above the threshold voltage, an FET is in the ‘on’ state.
In mixer 10 a gate bias at the gate terminal G of each FET Q1, Q2, Q3, Q4 alters gate voltage at the gate G, As will be understood from the above, when gate bias causes the gate voltage at any one of the FETs Q1, Q2, Q3, Q4 to rise above threshold voltage, that one FET begins to conduct. It will readily be understood that gate-connected FET pair Q1,Q3 share the same gate bias, as do gate-connected FET pair Q2,Q4
Gate bias in Mixer 10 can be introduced in two ways. Typically, gate bias is generated by gate current that flows at the positive peak of the voltage swing of the LO input signal. Alternatively, gate bias may be supplied externally by optional voltage source Vg and associated biasing circuitry (not shown in FIG. 1). As shown in FIG. 1, optional voltage source Vg is applied to LO drive through LO balun T1 to provide gate bias.
Operation of mixer 10 having gate bias generated by gate current will now be described. When the LO input signal drives the gate terminals G of FET pair Q1,Q3 more positive than their voltage, the behaviour of FET Q1 and FET Q3 can each be approximated as a simple resistive connection, i.e., channel, between the RF balun T2 and IF balun T3. And similarly, when the LO input signal drives gate terminals G of FET pair Q2,Q4 more positive than their voltage threshold, the behaviour of FET Q2 and FET Q4 can likewise be approximated as simple a resistive connection, having an opposite polarity than that of FETs Q1 and Q3, between RF balun T2 and IF balun T3. This polarity shift between baluns T2 and T3 driven by the LO input signal provides the desired mixing action. The resistance of a conducting FET can be referred to as FET channel resistance and will be further described below.
Introduced above, field effect transistors Q1, Q2, Q3, and Q4 are considered to be symmetrical devices. However, the approximation of entirely symmetrical behaviour for each of the FETs Q1, Q2, Q3, and Q4 such that each FET Q1, Q2, Q3, Q4 acts as a simple resistive connection, i.e., channel, when gated on is not accurate. This is because the voltage of the RF input signal at the RF terminal, i.e., the RF voltage, is not static, but rather varies. As the RF voltage varies, the voltage drop across a conducting FET Q1, Q2, Q3, Q4 likewise varies.
The value of the FET channel resistance of a conducting FET Q1, Q2, Q3, Q4 is dependent upon the voltage between that FET's gate terminal G and the more negative one of that FET's source terminal and drain terminal. Thus, the FET channel resistance between RF balun T2 and IF balun T3 through a conducting FET Q1, Q2, Q3, Q4 is not constant. It is modulated by and dependent upon the amplitude of the RF voltage at any given time. Accordingly, the FET channel resistance of a conducting FET in mixer 10 can more accurately be referred to as modulated FET channel resistance.
The varying FET channel resistance, modulated by RF voltage, present in each FET Q1, Q2, Q3, Q4 of mixer 10 causes undesirable intermodulation distortion, including third-order intermodulation distortion, in the IF output signal of mixer 10.